Textbook of AI

Also known as: stored-program architecture

The von Neumann architecture, set out in John von Neumann's 1945 First Draft of a Report on the EDVAC, is the stored-program computer design that became the template for every general-purpose CPU built since. It has four main components: a single addressable memory that stores both program instructions and data uniformly; an arithmetic-logic unit (ALU) that performs computation; a control unit that fetches, decodes and executes instructions; and input/output devices.

The defining feature is the stored-program principle: programs are data, residing in the same memory as the data they manipulate, and can be read, written and modified by other programs. This contrasts with earlier "Harvard architecture" designs (separate program and data memories) and with hard-wired or plugboard-programmed machines like ENIAC.

The architecture has well-known limitations. The von Neumann bottleneck, the bandwidth bottleneck between CPU and memory, is the dominant performance constraint of modern hardware, partially mitigated by caches, prefetching, and increasingly by computation-in-memory designs. Modern AI accelerators (GPUs, TPUs, NPUs) preserve the stored-program principle while reorganising around massive parallel arithmetic and high-bandwidth memory hierarchies, they are von Neumann at every level of abstraction above the lowest.

Despite the bottleneck, the architecture's flexibility, the same hardware runs any program, has been so dominant that nearly every general-purpose computing device, from smartphones to supercomputers, follows von Neumann's 1945 design.